A new very low-voltage, low-power CMOS RF mixer

dc.Affiliation	October University for modern sciences and Arts (MSA)
dc.contributor.author	ElDeib, Ahmed
dc.contributor.author	AbdelRassoul, Roshdy A.
dc.date.accessioned	2019-12-03T11:53:12Z
dc.date.available	2019-12-03T11:53:12Z
dc.date.issued	2008
dc.description	Accession Number: WOS:000257003900067	en_US
dc.description.abstract	A new very low power RF mixer is introduced. The proposed mixer is based on two techniques: A CMOS transistor pair is applied to the four cross-coupled commutating transistor (the first technique), and current boosted technique, as described in the paper. The CMOS mixer is simulated in 0.18 mu m CMOS technology. The mixer has an input signal of 0.2 V and operates on a single 3.3 V supply with transistor threshold voltages of 0.57V for all NMOS transistors and -0.52V for all PMOS transistors, and has a power dissipation of 2.66 mW.	en_US
dc.description.sponsorship	Acad Sci Res & Technol; Natl Radio Sci Comm; Tanta Univ, Fac Engn	en_US
dc.identifier.citation	Cited References in Web of Science Core Collection: 5	en_US
dc.identifier.isbn	978-977-5031-95-2
dc.identifier.uri	https://ieeexplore.ieee.org/document/4542369
dc.language.iso	en	en_US
dc.publisher	IEEE	en_US
dc.relation.ispartofseries	25th National Radio Science Conference;
dc.relation.uri	https://cutt.ly/ue3ff0n
dc.title	A new very low-voltage, low-power CMOS RF mixer	en_US
dc.type	Book chapter	en_US

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