A new very low-voltage, low-power CMOS RF mixer

Abstract

A new very low power RF mixer is introduced. The proposed mixer is based on two techniques: A CMOS transistor pair is applied to the four cross-coupled commutating transistor (the first technique), and current boosted technique, as described in the paper. The CMOS mixer is simulated in 0.18 mu m CMOS technology. The mixer has an input signal of 0.2 V and operates on a single 3.3 V supply with transistor threshold voltages of 0.57V for all NMOS transistors and -0.52V for all PMOS transistors, and has a power dissipation of 2.66 mW.