Delay Optimization of 4-Bit ALU Designed in FS-GDI Technique
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Date
2019
Journal Title
Journal ISSN
Volume Title
Type
Book chapter
Publisher
IEEE
Series Info
International Conference on Innovative Trends in Computer Engineering (ITCE);Pages: 534-537
Doi
Scientific Journal Rankings
Abstract
Arithmetic Logic Unit (ALU) is an essential building block in many applications such as microprocessors, DSP, and image processing, while power efficiency is a general concern in VLSI design. This paper presents Delay time optimization of 4-bit ALU designed using full-swing gate diffusion input (GDI) technique. Simulations carried out in Cadence virtuoso using 65nm TSMC processes with a supply voltage of 1.2 volts and a frequency of 125 MHz, Simulation results revealed improvement in Delay time and overall Energy of the optimized ALU design
Description
Accession Number: WOS:000462976100089
Keywords
October University for University for Arithmetic Logic Unit (ALU), Gate Diffusion Input (GDI), Full-Swing GDI (FS-GDI)
Citation
Cited References in Web of Science Core Collection: 6