DS-CDMA Receiver using Switched-Capacitor Analog Correlator Circuit for Parallel Processing System LSIs

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dc.contributor.author Eltokhy, Mostafa Aly Refay
dc.date.accessioned 2019-11-30T07:05:25Z
dc.date.available 2019-11-30T07:05:25Z
dc.date.issued 2008
dc.identifier.citation Cited References in Web of Science Core Collection: 5 en_US
dc.identifier.isbn 978-1-4244-2627-0
dc.identifier.uri https://ieeexplore.ieee.org/abstract/document/4746869
dc.description Accession Number: WOS:000267291600009 en_US
dc.description.abstract A switched-capacitor analog correlator using balanced charge pump circuit, capable of pumping same amount of charge in positive and negative direction is proposed for Code Division Multiple Access (CDMA) bus interface. In addition, the amount of charge injection is independent of the output voltage. The proposed charge pump circuit is applied to the analog correlator in the receiver module of CDMA wired bus interface. The bus architecture features low bus power consumption, noise tolerance and dynamical programmability. The new circuit operates at 100MHz. Simulation results of the CDMA bus interface by using 3.3V supply voltage for the proposed analog correlator, verified that the charge pump circuit fulfils its design requirements. en_US
dc.description.sponsorship IEEE en_US
dc.language.iso en en_US
dc.publisher IEEE en_US
dc.relation.ispartofseries 2nd International Conference on Signals, Circuits and Systems;Pages: 46-49
dc.relation.uri https://cutt.ly/he2jkSd
dc.subject University for Analog correlator en_US
dc.subject CDMA en_US
dc.subject Spread spectrum en_US
dc.subject switched-capacitor en_US
dc.subject tradeoff en_US
dc.title DS-CDMA Receiver using Switched-Capacitor Analog Correlator Circuit for Parallel Processing System LSIs en_US
dc.type Book chapter en_US
dc.Affiliation October University for modern sciences and Arts (MSA)


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