S. El-Hennawey, MohamedC. Lynch, JohnSaunders, Marc2020-02-052020-02-052006US20070130446A1 * 2005-12-05 2007-06-07 Nec Electronics Corporation Processor apparatus including specific signal processor core capable of dynamically scheduling tasks and its task control method US20090161884A1 * 2007-12-19 2009-06-25 Nortel Networks Limited Ethernet isolator for microphonics security and method thereof US20140075154A1 * 2011-04-16 2014-03-13 Mark Henrik Sandstrom Task Switching and Inter-task Communications for Multi-core Processors US10061615B2 2012-06-08 2018-08-28 Throughputer, Inc. Application load adaptive multi-stage parallel data processing architecture US10133599B1 2011-11-04 2018-11-20 Throughputer, Inc. Application load adaptive multi-stage parallel data processing architecture US10318353B2 2011-07-15 2019-06-11 Mark Henrik Sandstrom Concurrent program execution optimizationhttps://t.ly/M3eL3MSA Google ScholarA given DSP, when processing signals of a channel, stores channel instance data in a multiplexed memory in association with itself. If the channel processing task changes to one for which the given DSP is not optimised, the given DSP moves the channel to an appropriate new DSP. Additionally, the given DSP transfers the association of the channel instance data to an association with the new DSP. In this way, the new DSP is provided with the channel instance data without the requirement for physically transferring such data.enUniversity of Multiprocessor systemsInstance memoryOther