Browsing by Author "Shaker A."

Now showing 1 - 4 of 4

A comprehensive semi-analytical model of the polysilicon emitter contact in bipolar transistors
(2018) Zekry A.; Shaker A.; Ossaimee M.; Salem M.S.; Abouelatta M.; Shehata, K., Modern Science and Arts University, Giza, Egypt; Bahaa, A., Modern Science and Arts University, Giza, Egypt; Morad, K., Modern Science and Arts University, Giza, Egypt; Sharaf, A., Modern Science and Arts University, Giza, Egypt
This paper presents a design and implementation of two current relay prototypes. The first one is based on FPGA, it protects against over-current, phase loss and locked rotor. This design is implemented, downloaded and tested on Altera Flex 10k10LC84-4 device. The second prototype is microcontroller based Multi Function Relay, it protects against over current, undercurrent, phase loss, locked rotor, phase unbalance and ground fault. This design is implemented and tested on Atmel microcontroller ATMega16PC0351I. Finally, both prototypes specifications were referenced to SMWAHA EOCR-Schneider Electric protection relays EOCR-SS and EOCR-3EZ respectively according to the European and Korean standards. � 2004 EEE.
Design and simulation of proposed low cost solar cell structures based on heavily doped silicon wafers
(Institute of Electrical and Electronics Engineers Inc., 2017) Salem M.S.; Zekry A.; Shaker A.; Abouelatta M.; Department of Electrical Comm. and Elec. Systems Eng.; Faculty of Eng.; Modern Science and Arts University; Cairo; Egypt; Department of Computer Engineering; Faculty of Computer Science; Hail University; Saudi Arabia; Department of Elec. and Comm. Eng.; Faculty of Eng.; Ain Shams University; Cairo; 11517; Egypt; Department of Eng. Physics and Mathematics; Faculty of Eng.; Ain Shams University; Cairo; 11517; Egypt
This paper aims to present the design and simulation of two proposed low cost solar cell structures; namely, pn and npn. Both structures are based on commercially available low cost heavily doped silicon wafers. Their operation relies on the idea of vertical generation and lateral collection of the light generated carriers. A detailed qualitative analysis of both structures is given and verified using advanced TCAD tools. The comparison is analyzed firstly regarding the illuminated IV characteristics. The open circuit voltage (V oc ), short circuit current density (J sc ), fill factor (F.F) and conversion efficiency (? c ) are calculated. Additionally, the optical performance is calculated and compared for both structures. The quantum efficiency, the spectral response and the absorption curve are compared. The presented results show that npn structure gives better electrical and optical performance than the pn one. � 2017 IEEE.
Parasitic Suppression in 2D Smart Power ICs Using Deep Trench Isolation: A Simulation Study
(Natural Sciences Publishing, 2019) Abouelatta M.; Salem M.S.; Shaker A.; Elbanna M.; Zekry A.; Gontrand C.; Faculty of Engineering; Ain Shams University; Cairo; Egypt; Computer College; Hail University; Hail; Saudi Arabia; Modern Science and Arts University (MSA); Cairo; Egypt; INSA- Lyon; Villeurbanne; France; IEP; Universit� Euro-m�diterran�enne de F�s; INSA- F�s; F�s; Morocco
In this letter, a planar integration using the deep trench isolation (DTI) technique is proposed to suppress the inter-well parasites in smart power integrated circuits implemented in 0.35��m BiCMOS technology. In this technology, all devices share the same epitaxial layer. This can lead to a punch-through between power devices as well as between power and low-voltage CMOS devices. A DTI scheme is used to suppress the effect of the parasitic BJT by using a P+ retardation implant region under the deep trench isolation region. The injection ratio of the parasitic BJT is reduced by a factor between 3 and 8.5. The effect of the trench length and the retardation implant is investigated using SENTAURUS TCAD simulations. It is confirmed, through using TCAD simulations, that the amount of the collected carriers of the sensitive devices changes as a function of the trench length and the presence of the retardation implant. � 2019, The National Academy of Sciences, India.
Performance enhancement of a proposed solar cell microstructure based on heavily doped silicon wafers
(Institute of Physics Publishing, 2019) Salem M.S.; Zekry A.; Shaker A.; Abouelatta M.; Abdolkader T.M.; Department of Electrical Communication and Electronics Systems Engineering; Faculty of Engineering; Modern Science and Arts University; Cairo; Egypt; Department of Computer Engineering; Computer College; Hail University; Hail; Saudi Arabia; Department of Electronics and Communications; Faculty of Engineering; Ain Shams University; Cairo; Egypt; Engineering Physics and Mathematics Department; Faculty of Engineering; Ain Shams University; Cairo; Egypt; Department of Basic Engineering Sciences; Faculty of Engineering; Benha University; Egypt
This paper aims to present a proposed npn solar cell microstructure based on low cost heavily doped Silicon wafers. The physical perception of the proposed structure is based on the idea of vertical generation and lateral collection of light generated carriers. It should be mentioned that our structure can be utilized whenever the diffusion length of photogenerated electron hole pairs is smaller than the penetration depth of the solar radiation. The enhancement in the structure performance is attained by the optimization of the structure technological and geometrical parameters and based on practical considerations. This enhancement enables achieving the maximum possible structure conversion efficiency. Moreover, the optical performance, in terms of the spectral response and external quantum efficiency, is presented. The optimization is carried out using SILVACO TCAD process and device simulators. The main parameters used in optimization include the thickness and doping of the top n + layer as well as the sidewall emitter. Additionally, the structure base width along with the notch depth are considered. Finally, back surface treatment is introduced. The structure conversion efficiency in the initial step before optimization was 10.7%. As a result of the optimization process, the structure conversion efficiency is improved to about 15% above the initial case study by 4%. � 2019 IOP Publishing Ltd.